Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/Series1/EFR32MG1B/EFR32MG1B231F256GM32/LDMA/CHEN#0x0
DMA Channel Enable Register (Single-Cycle RMW)
Channel Enables
https://github.com/cmsis-svd/cmsis-svd-data